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Altera_Forum's avatar
Altera_Forum
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17 years ago

Cyclone II embedded RAM synthesize away

I am doing mp3 decoder project using DE2 board and Quartus 8. module decoder ( /* irrelevant declaration */ output FL_CE_N // FLASH Chip Enable ,output wire mem_writedata )...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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I took a brief look at the project. I think, mem_writedata is indirectly the only output path depending on the said memory block. So removing this output makes the memory block obsolete. You easily test this assumption by connecting an additional output port from the memory directly.

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thank you very much. I somehow managed to solve the problem