Forum Discussion
Altera_Forum
Honored Contributor
10 years agoCurly braces
Hi, I was looking through a program and found the following code {a2, a1} <= {a1, b}; I am not sure whether the program that I'm going through is written in Verilog or System Verilog. I...
Altera_Forum
Honored Contributor
10 years agoIf a1, a2, b are all the same bit width, then:
{a2, a1} <= {a1, b}; is the same as writing: a2 <= a1; a1 <= b; or even: a1 <= b; a2 <= a1; the result will be the same given the non-blocking assignment usage. The curly brace version is just a syntactical shorthand. However, if the bit widths of a1, a2, and b are not all the same, then other operations could be taking place. So the real answer is 'it depends'.