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Altera_Forum's avatar
Altera_Forum
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9 years ago

Curly braces

Hi, I was looking through a program and found the following code {a2, a1} <= {a1, b}; I am not sure whether the program that I'm going through is written in Verilog or System Verilog. I...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

--- Quote Start ---

It could be a shift operation:

a2 < a1;

a1 <= b;

--- Quote End ---

Thank you for the answer. Yes it is a shift. What I really wanted to know was why concatenation is being done on the right hand side. I figured that both on the LHS and RHS the given two registers are concatenated together (on each side) and then mapped bit by bit.