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Altera_Forum
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14 years ago

Creating Flip-flop by using logic gates

Hi, I am a student who new to VHDL and currently doing VHDL assignment. In this assignment, students are required to create the D, JK flip-flop. I need help to solve my error for my code ...
Altera_Forum's avatar
Altera_Forum
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14 years ago

There was a similar thread few days ago under the same topic "creating flipflops by using logic gates".

I will point out that your design defeats the purpose because you are not creating D flop from logic but you are inferring it at:

Q <= D;

thus you might not impress your professor...