Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks for the response Daixiwen
The clock source is generated from a PLL instantiated from within an existing verilog module which I am trying to port to the Avalon protocol. (I'm trying to bring a fairly complex project into SOPC Builder by creating Avalon MM ports for each of the modules and re-writing code where necessary). Is it possible to instantiate a PLL from a custom component within SOPC Builder? or do I need to restructure the code so that the PLL is instantiated from within SOPC Builder or the top level Quartus system? Ref you're other comment, I connected the clock output from the SOPC Builder to an output pin so I could view it on a scope - that's when I get the error message in the previous post. My other thought was that simulating the hardware in SOPC Builder might resolve the issue - I'm currently working through a Modelsim licensing issue. Any thoughts on any of the above would be gratefully received