Creating clock sources in SOPC Builder

You should just define your clock in SOPC builder and an input port will be created on the SOPC component. Connect that port to either a pll or a FPGA input pin.

What do you exactly mean by "creating a clock" in verilog? The only good clock you can have in an FPGA is from an external source, or a pll driven by an external source. Creating an oscillator with logic cells will be at best very unreliable, and if you are using delays in the verilog code it won't be synthesizable.