Forum Discussion
MINGYOU
New Contributor
3 years agoCrash when using count value as vector signal
Below is my code module simple_circuit(F,A): input [0:3]A: output [0:1]F; assign F[0] = A[0] || A[1]&&A[2] || A[1]&&A[3]; endmodule Then I used University Program VWF, Insert the node, and ch...
ShengN_altera
Super Contributor
3 years agoHi,
You can't use count value "count every" on bundled signals in vector waveform simulator. That only works on single bit signal. Check image:
Thanks,
Best Regards,
Sheng
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