Correct way to use Components?

Hello,

to use a component a component, you have to instatiate it in sequential statement section of the architecture, the section after begin that is blank in your example. The component declaration is only to make the entities interface known. Additional, a syntax for "direct" instantiation of an VHDL entity exists, but it is rarely used.

In Quartus, you have HDL templates since V7.0, that shows e. g. the syntax for component instatiation.

You can use as many components in an architecture as you like to. Basically, the declaration section can contain declarations of types, signals, constants, functions, procedures and components in an arbitrary order. A component has to be declared once, but in many cases, multiple entity instances are referring the declaration, maybe instantiated automaticly in a generate loop.

You ask, how to use multiple components. Is there any reason to assume, that you're limited to one component declaration while you have e. g. multiple signals?

Multiplexers are possible in FPGA and widely used, e. g. for busses. But unlike busses used to interconnect individual logic devices, they have no partyline topology and thus don't use bus switches. They rather are unidirectional point-to-point connections, multiplexed at the receiver by AND/OR logic networks. In HDL, however you can treat them as they would be bidirectional busses connected by tristate drivers, using bidirectional INOUT port type. It is useful anyway to know the physical reality behind these HDL constructs.

Regards,

Frank