Cordic sincos function: how to depict a fixed point number as std_logic_vector type

1. No conversion is necessary. You've already said that the IP core uses fixed point representation, so your slv constains fixed point numbers.

2. With fixed point, each bit represents an decreasing 2^n, with the value in 2s compliment format

So, the MSB will be the sign bit (if signed).

The integer bits (range bits) just represent standandard integers. 01 = 1, 10 = 2, 11 = 3 etc.

The fraction bits represent values of 2^n where each value of N is negative,

eg, if you have 4 fracrtion bits, then then 1000 = 0.5, 0100 = 0.25, 0010 = 0.125, 0001 = 0.0625 etc

So the bits here represent 2^-1 downto 2^-4 etc.

The more bits you have, the better the accuracy you get.

This is simply just integers with a gain of 2^-N, where N is the number of fraction bits.