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Honored Contributor
Honored ContributorConvert AHDL to Verilog
I have a design in AHDL for a keyboard scanner and I'm trying to convert this to Verilog. The AHDL code is in the enclosed ZIP "kbd.zip". The Verilog code is shown hereunder. The line "assig...
Altera_ForumHonored Contributor
Honored ContributorShouldnt lresult be a 6 bit vector. Otherwise lresult is being driven by each iteration of the for loop.
If you didn't know, xilinx ise used to ship with an ahdl to vhdl/verilog translater. Xhdl I think.
