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Altera_Forum
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16 years ago

Controlling the setting of IO pad delays

I have a design which uses a PLL to create an internal copy of an external clock used to interface a processor to a Cyclone II. The aim is to optimise the transfers to and from the processor by ensur...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

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OK, thanks. I'm rebuilding with the multi-corner option on now which may persuade Quartus to choose the same values as I calculated. Thanks again for your help.

George

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Hi George,

good news. I found the setting for the assignment editor in order to set the delays for CycloneII.

I have the project attached. For the input you have a valid range from 0 - 7, for the output

0-1. For the real delays look into the resource property editor. You can check the setting under:

Compilation report -> Fitter -> Resource section -> Delay Chain summary

Kind regards

GPK