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Altera_Forum
Honored Contributor
Honored Contributorcontinuous averaging using VHDL
I have a question related to VHDL programming. I want to calculate the continuous average. My example code is:
process (clk, reset)
begin
if (reset = '1') then
state<=idle;
out-v...
Altera_ForumHonored Contributor
Honored ContributorI am puzzled now. What is then your data(11 downto 0)? isn't it adc data being converted as parallel word from the 12 bits serial stream?
sclk needs clock enable, where is your pulse that indicates data(11 downto 0) is ready? you need to put that pulse as if condition after sclk. you really need to revise your thoughts carefully and write code yourself as otherwise we will stay going in circles. Good luck.
