Constraining global signals

I seem to be having difficulty constraining signals as globals.

I have a user I/O pin that I am using as a low speed clock to a bank of registered I/OB's ("fast input registers"). So far so good - except the clock to register routing skew is high enough to corrupt data. So, I am trying to take my user I/O "clock" and place it on a global net to take advantage of it's high speed/low skew properties. Problem is, the tool downright ignores me. I have tried the constraint:

set_instance_assignment -name AUTO_GLOBAL_CLOCK ON -to ACH2B_CNTL[12]

to no avail - I can use this assignment to dis-allow the auto-globals the tool picks - but I can't seem to use place my critical nets on this resource.

I have even gone so far as to manually instantiate the "global buffer" component in my VHDL code on the desired nets.

When I have had this problem in the past, I have been able to inhibit the "auto global" on the few high fan nets of higher precedence until it will auto select my desired critical net, but in this instance, my critical net is about 60 entries down the list - too much for me to want to inhibit.

Any suggestions on how to drive the tool the proper way?

Tool: Quartus II V5.0 build 148

Target device 20KE1000EBC652