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Altera_Forum
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12 years ago

constant manipulation in VHDL statement

Hi, I am puzzled by the result of a VHDL code and hope someone could help understand the problem. ...... constant PERIOD : integer := 1000; constant A : integer := 4; constan...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

This kind of mistake happens to anyone ;)

But this shows how important it is to give all your code when you are encountering a strange problem and ask for help!