Connect between Blocks at VHDL

First you create a Quartus project with a name, say it "toto" for example. usually you give the same name to the top level entity:

entity toto is....

if you give a different, an error appears during compilation saying that can't find top level entity. Go to Assignments->Setting->general and select the top level entity from the box "Top-level entity".

Below the entity declaration, in same fiel, u write the architecture ( what you called the design of the entity ). Here you place the instantiation of the component ( entities located in diffent files. All files must be added to the project ).