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Altera_Forum
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12 years ago

Connect between Blocks at VHDL

Hi , i'm starting my final BS.c project and i'm doing it at Quartos and VHDL . I have blocks that i design at vhdl and i want to connect between them (logicly) , i know that there is an opt...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

appreciate your answer ,

Few more questions :

what do i write at the top level entity ? is it the entity declaration and Instantiation and interconnections ?

where do i write the design of the entity ? at other file or at the same file ?

Thank you very much !