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Altera_Forum
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12 years ago

Connect between Blocks at VHDL

Hi , i'm starting my final BS.c project and i'm doing it at Quartos and VHDL . I have blocks that i design at vhdl and i want to connect between them (logicly) , i know that there is an opt...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

When you instantiate a component you can map its inputs and output to the inputs and output of the top level entity or to internal signals. To connect the signal of 2 components use internal signals. I post a code of a circuit based on nand gates. This gates were implemented in a different component and instantiated many times. It's only for academic purposes.