Confused over division by shifting

Hi Kaz and derim,

Thanks for your response. I'm willing to loose the 8 LSB as I'm only concerned about the 8 MSB ( 15 down to 8 ). I found one code in a book which is as follows :

Architecture abc of filter is

Type A0 is ARRAY (0 to 1) of SLV1; ---- SLV1 - logic vector of (7 downto 0 )

Type A1 is ARRAY (0 to 1) of SLV2; ---- SLV2 - logic vector of (15 downto 0 )

Signal f : A0;

Signal xemu : A1;

Begin

process1 : process (clk)

begin

f(1) <= xemu(1)(15 downto 8 ) ---- divide by 2 ( Here it says that it's getting divided by 2 )

end process;

end abc;

That was really confusing for me . Could you please kindly clear my confusing over this ?

Thanks,