Honored ContributorI am trying to implement the table for cordic algorithm. However, I got several critical warning messages:
1. No exact pin location assignment for the pins. 2. Synopsys Design Constaints File not found: 'lut.sdc', which is required by TimeQuest Timing Analyzer to get proper timing constrainsts. The file is attached. Does anybody have any idea on how to fix the above two warnings? Thanks in advance.
Honored ContributorHi,
the first is just a reminder, that you have not assigned the I/O pins, i.e. the compiler will define the pinout and this might most likely cause trouble in any real hardware implementation as at least on the board there must be a defined and stable device IO pin to signal assigenment. As soon as you define this in the assignment editor, this warning dissapears... Second warning is that the TimeQuest timing analyzer requires additional constraints to be set in assignments => TimeQuest Analyzer Wizard... RegardsHonored ContributorThanks. Can you clarify futher what constraints I need to set?
I have followed the same procedure for other design (simply one of course), but I didn't run any issues like this one. Why did this one make so much difference? Thanks in advanceHonored ContributorHonored Contributorit is already done in the case statement
