Honored Contributor
Honored ContributorYou can use Makefiles, but Tcl is also an option. For example, see the scripts created with this project:
http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial Makefiles are good when you can create dependencies, eg., a .o file is created from a .c file. Unfortunately for synthesis, there is no .o file. HDL code gets compiled into the "black box" that is the Quartus database. Altera does provide an application that makes it possible to track internal dependencies, but I've never used it. Tcl has sufficed for me. Modelsim also has a facility to create Makefiles. However, they're useless. The way it creates the compilation order is to try, and if failure occurs, re-order and try again. Since Modelsim generates files in database directories, you can create dependencies, or 'touch' files to create xxx.done timestamps. Basically you have to create a Makefile manually, with your design files in the correct order (packages first, then source), and then create mega-dependencies, i.e., rebuild all source if any of the packages change (I do this since I've never found a dependency generator for VHDL files, i.e., this source depends on these packages). You'll also face issues with how Make deals with directory paths in Cygwin vs Linux ... Start with Tcl, see if that is enough for you. Cheers, Dave
