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Altera_Forum's avatar
Altera_Forum
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13 years ago

Compilation Report

hello, I have a datapath that has 3 memory blocks. I have used ram 1 port for these blocks. and I have used schematic file for connecting these blocks and other parts. but when I compiled it , in ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

check the warings to see if it has synthesised away some of your logic and rams.