--- Quote Start ---
Hi everybody,
Currently I am working on a fancy Quartus II project in which compilation time takes more than 3h. I noticed than sometimes, if I completely perform the synthesis and fitting steps and then, for some irrelevant reason, I close the application (say because I had a meeting or it's the end of the day, whatever), when I reopen this project and try to perform the assembling processes to finally do some HW tests, everything starts from the beginning again. I mean, I see that the compilation project starts
from the very first synthesis step, like if I had never completed this before (however I did). And what is more strange is that the project
has not been changed since the last fitting; the only conflicting action here seems to be that I let Quartus rest for a while. Does anybody know any way to avoid this "phenomenon"? Perhaps there is an arcane trick (I pressume through command-line) to force the application to accept and work on the last synthesis and fitting results, as there is in some competitor's tools whose name starts with an 'X'. Thank you in advance!
Best regards,
P.
--- Quote End ---
Somewhere in the compiler settings you will find the option of "turn smart compilation on" and it "smartly" escapes initial stages but probably not fitting stage.
3 hours, more or less depends on the project size, fitting and timing closure, your PC etc so varies a lot and my personal experience is that xilinx ISE clutter of tools is slower than the compact quartus (plus now Timequest cluttered out) while SysGen is extremely slower than DSPBuilder (just to be fair).
Honored Contributor
