Forum Discussion
sneha_wagh
New Contributor
3 years agoCompilation on quartus tool fails for encrypted verilog and verilog header files
Hi,
I am trying to compile the encrypted design [generated by synopsys designware core]. This design is encrypted.
Quartus tool is not able to compile this encrypted design.
Quartus Tool versi...
RichardT_altera
Super Contributor
3 years agoWe have removed the EDA Tool Option GUI in Quartus Pro.
You may checkout this user guide on the Synplify* 2.2. Design Flow
https://www.intel.com/programmable/technical-pdfs/683122.pdf
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.