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sneha_wagh's avatar
sneha_wagh
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3 years ago

Compilation on quartus tool fails for encrypted verilog and verilog header files

Hi, I am trying to compile the encrypted design [generated by synopsys designware core]. This design is encrypted. Quartus tool is not able to compile this encrypted design. Quartus Tool versi...
sneha_wagh's avatar
sneha_wagh
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3 years ago

Hi Richard,

As evaluation license borrowing of Synplify is in process, I wanted to check that where we should mention in Quartus tool about this synplify tool installation path ?

https://www.intel.com/content/www/us/en/docs/programmable/683796/18-1/using-the-software-to-run-the-synplify.html

In above document, it is mentioned that:

To set up the Intel® Quartus® Prime software to run the Synplify software, do the following:

  1. On the Tools menu, click Options.
  2. In the Options dialog box, click EDA Tool Options and specify the path of the Synplify or Synplify Pro software under Location of Executable.

We are using Quartus Prime Software version 22.3

I was able to see Tools menu -> Options.

But did not find out "EDA Tool Options".

Regards

Sneha