Forum Discussion
sneha_wagh
New Contributor
New ContributorCompilation on quartus tool fails for encrypted verilog and verilog header files
Hi,
I am trying to compile the encrypted design [generated by synopsys designware core]. This design is encrypted.
Quartus tool is not able to compile this encrypted design.
Quartus Tool versi...
RichardT_altera
Super Contributor
Super ContributorCould you try to set the synthesis tool to Synplify Pro in Quartus? Go to Setting > EDA Tool Settings > Design entry/ synthesis > Synplify Pro.
Usually third party encryption tool will need Quartus public key to encrypt then the Quartus can compile it.
The documentation that I found about Synplify support:
https://www.intel.com/content/www/us/en/docs/programmable/683122/18-1/synopsys-synplify-support.html
Best Regards,
Richard Tan
