Compilation Error on Quartus 20.1 Lite

Hello Richard,

Sorry for the late reaction. It's difficult for me to give a feedback here since i have right now experienced a very twisted situation with Quartus Lite.

Following the discussion here about the limited support for VHDL 2008, I decide to use instead of unresolved_unsigned type an unsigned type signal. Although the unsigned type is defined as a subtype of unresolved_unsigned, the compilation error that I had was solved.

However I still could not compile my design on quartus because it has now a problem with the simple shift right operator sra.

The compiler can not find a definition for this operator with operands of type unsigned or std_ulogic_vector although this operator is defined in the package NUMERIC_STD from Quartus in the data numeric_std_unsigned_vhdl2008.vhdl with operands of type unresolved_unsigned and in the package numeric_std_unsigned with the operands of type std_ulogic_vector.

Now I have no clue what is going wrong here. Do I have an installation related problem or it's solely due to limited vhdl 2008 support?

I'm disappointed because i'm expecting from any eda tool supporting vhdl design, a very simple support for basic operators as logical operators here, shifting operators.

So If there are users who experience similar problems, I will be very happy to read from them.

Best Regards

Ludovic