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Altera_Forum's avatar
Altera_Forum
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14 years ago

Code Coverage: covering a module within testbench

Hi all, making the code coverage with Modelsim on my VHDL testbench, the result is 100%, but only a single instruction is covered, which is the one that calls the sub-module within the testbenc...
Altera_Forum's avatar
Altera_Forum
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14 years ago

What compilation options are you using in Modelsim? I think that code coverage will probably be disabled if optimizations are enabled during the compilation.

I've never used code coverage in Modelsim (the version distributed with Quartus doesn't include that) but maybe you'll find more information about that in the manual.