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Altera_Forum
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8 years ago

Close Timing on FIR filter designs in Cyclone V

Hiya All, I'm running a signal processing system employing a number of FIR filters and I am having difficulties closing timing. Please can anyone help me optimize my design for speed. I am running...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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Yeah, sure ... ever tried a recursive averager (http://zipcpu.com/dsp/2017/08/19/simple-filter.html)? Such an averager can be used to filter a signal really close to DC. Subtract that from your incoming signal and you have a highpass filter. It's not FIR, it's IIR, but ... it should work nicely for you from the description you've just given. It's also *really* easy to build. I've used it in time past to remove fixed DC biases from sampled signals.

Dan

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Hi Dan, I really like that idea. Thanks. I can run the averager at 100Msps and run the rest of the system at 200Msps. Nice one.

I will let you know how I get on. Cheers Dave