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Altera_Forum's avatar
Altera_Forum
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10 years ago

Changing PLL speed after compilation

Using Quartus II 13.1.0, device is Arria V GX family.

I am trying to change the speed of a PLL in my design without recompiling. I open the chip planner, make sure it's in ECO mode, select the PLL, right click and "Locate in Resource Property Editor". In the Properties tab, I can see the properties I want to edit, but they all have a grey background and my only option when right clicking is "Export All Properties of The Selected Node(s) As...". According to the documentation I should be able to change the values from here. What am I missing?

Additionally, I would rather make the modifications via tcl scripts, which should also be possible. Where can I find scripts to do this, or the documentation for the commands I would need to do this?

Thanks.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    I've never tried changing that, but there are a number of things that can't be changed via RPE. If it's grayed out, I'm guessing it's not possible. Two other things to try, which involve changing the PLL source:

    1) Rapid recompile, if it's available. (Processing -> Start -> Rapid Recompile)

    2) Put the PLL in a partition. Set your partition Top that already exists to Post-Fit, then recompile.

    Neither will be as fast as what you want via RPE, but minimally the second should do the trick.