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Altera_Forum
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8 years ago

Cascaded Interpolation Filter and Restricted Fmax

Hallo For my design i am using Simulink and HDL coder from MATLAB to generate the HDL code. Then i use the Altera Quatras II to synthesize and generate the programming file for my DE0-NANO deve...
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Altera_Forum
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8 years ago

This should not be a math issue. I think you adders are too wide to operate in one clock cycle. In a current Cyclone 4 I have a CIC4-Fiter working at 100 MHz, but it has to be pipelined in 5 stages.