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Altera_Forum
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8 years ago

Cascaded Interpolation Filter and Restricted Fmax

Hallo For my design i am using Simulink and HDL coder from MATLAB to generate the HDL code. Then i use the Altera Quatras II to synthesize and generate the programming file for my DE0-NANO deve...
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Altera_Forum
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8 years ago

This is likely a design issue. Have you got plenty of delay blocks breaking up your pipeline? 50Mhz seems rather slow, I would expect 150Mhz+ for a well pipelined design.