Forum Discussion
ContributorCapturing Signals with SignalTap using a "burst" clock
I have confirmed what was happening. SignalTap was triggering but it was waiting for it's buffer to fill up before it would stop.
I modified my design to let the clkDebug run continuously once I had captured the states of interest (which fills the buffer) and I get what I was after.
Super ContributorA better solution would be to use a continuous clock for triggering and use the storage qualification feature to have the tool only store the samples in the buffer you want/need. There are a number of storage qualification options you can use.
And yes, as you found, if the buffer does not fill up completely on its own, the logic analyzer continues to run until it does fill or you manually stop it, at which point you can see data in the partially full buffer. So your trigger did occur.
