Cant resolve multiple constant drivers

I am getting this error while trying to compile my VHDL code.

Error (10028): Can't resolve multiple constant drivers for net "wave" at SM_VHDL.vhd(62)

Here is my code. I am very new to VHDL so if you could explain to me what the problem is that would be great.

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.all;

USE IEEE.STD_LOGIC_ARITH.all;

USE IEEE.STD_LOGIC_UNSIGNED.all;

ENTITY SM_VHDL IS

PORT(reset, clock : IN std_logic;

sw : IN std_logic_vector(2 DOWNTO 0);

wave : OUT std_logic);

END SM_VHDL;

ARCHITECTURE a OF SM_VHDL IS

TYPE STATE_TYPE IS (state1,state2,state3,state4,state5,state6,state7,state8);

SIGNAL state : STATE_TYPE;

BEGIN

PROCESS (clock, reset)

BEGIN

-- Reset to this state

IF reset = '1' THEN

state <= state1;

ELSIF clock'EVENT AND clock = '1' THEN

-- Case statement to determine next state

CASE state IS

WHEN state1 =>

state <= state2;

WHEN state2 =>

state <= state3;

WHEN state3 =>

state <= state4;

WHEN state4 =>

state <= state5;

WHEN state5 =>

state <= state6;

WHEN state6 =>

state <= state7;

WHEN state7 =>

state <= state8;

WHEN state8 =>

state <= state1;

WHEN OTHERS =>

state <= state1;

END CASE;

END IF;

END PROCESS;

wave <= '1' WHEN (state = state1);

wave <= '1' WHEN (state = state2 AND sw >= "001") ELSE '0';

wave <= '1' WHEN (state = state3 AND sw >= "010") ELSE '0';

wave <= '1' WHEN (state = state4 AND sw >= "011") ELSE '0';

wave <= '1' WHEN (state = state5 AND sw >= "100") ELSE '0';

wave <= '1' WHEN (state = state6 AND sw >= "101") ELSE '0';

wave <= '1' WHEN (state = state7 AND sw >= "110") ELSE '0';

wave <= '1' WHEN (state = state8 AND sw >= "111") ELSE '0';

END a;