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Altera_Forum
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14 years ago

Can't place all RAM cells in design

Hi, I´m using a Stratix III FPGA board EP3SL150F1152C2 and I try to build up a NiosII Core. My components are a clock, onchip memory, NIOS II Core and some more. Now I got a problem when i comp...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Your onchip memory is too big. The FPGA that you are using has 16 M144K blocks (256kb memory) and 355 M9K blocks (355kb). The onchip memory component can only use one type of memory block at a time and none of them can hold 400kb.

Try to use less memory, of if you really need that much, divide it in two components. I don't know if Quartus will figure out by itself that it needs to use the two types, you may have to force the block type to M9K on one of the two components.