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Altera_Forum
Honored Contributor
10 years agoCan't determine definition of operator ""srl""
Hallo This is my first project with Altera. I am using the quatras 2 synthesis tool and simulink to generate a design for my FPGA. But when i try to synthesis the code i get the following error...
Altera_Forum
Honored Contributor
10 years agoHallo
So did a change in the MATLAB code and it complets the logic synthesis now. i changed the x to x = bitshift(x,-3) %bitshift is a builting MATLAB function My next question is to perform mapping is it necessary to have the device connected to the pc? I still dont have a development board from ALTERA. Can i post the questions with the mapping later on this thread or should i ask it on a new thread?