Forum Discussion
5 Replies
- Altera_Forum
Honored Contributor
This isnt VHDL. what language are you refering to.
- Altera_Forum
Honored Contributor
--- Quote Start --- This isnt VHDL. what language are you refering to. --- Quote End --- Really??? I carefully looked on project and noticed, that some modules (and this one ) pointed as AHDL. I am beginner and didn't give heed to this. Thank you. And excuse me for my unvigilance. - Altera_Forum
Honored Contributor
The $ is an exclusive or operator where the # is the 'normal' or operator, at least that is what they are in AHDL.
For completeness: & is the and operator and ! is the not operator. - Altera_Forum
Honored Contributor
The code you posted is AHDL. Who told you it was VHDL?
- Altera_Forum
Honored Contributor
--- Quote Start --- The $ is an exclusive or operator where the # is the 'normal' or operator, at least that is what they are in AHDL. For completeness: & is the and operator and ! is the not operator. --- Quote End --- Thank you !!!