Can Avalon-MM Slave BFM Intel FPGA IP be used to implement a memory block?

Did anyone write an example using the APIs to create the simple Memory Read and Memory Write Device using the avalon_mm_slave_bfm? There is a lot of power in the API but I could see just doing basic command response and command processing to build such a function. I would find it preferred over rolling my own and the avalon_mm_slave_bfm already has all the hooks and checks for proper operation on the Avalon Bus.

I think a lot of us could use an example like this?

TomT...