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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Burstcount

hello, ive programmed a simple slave component for my sopc, and id like to write bursts to it

ive read the avalon pdf and followed the instructions and waveforms now

my question is how does a master / cpu knows the value of the burstcount signal?

im using a nios component writing strings to the slave and i noticed the burstcount signal value remains 1 (which is the lowest value possible it) even though im writing 80 bursts of 1 byte, am i doing something wrong?

thanks in advance

IdanP

edit: hi again =]

im getting this warning on my quartus' console:

"Using design file LPT_SOPC.vhd (the hardware description of my sopc) which is not specified as a design file for the current project, but contains definitions for 10 design units and 20 entitites in the project"

searched here and google with no useful results, how can i set it as the design file for my project?

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    The Nios II processor only supports bursting when filling/flushing the cache. In all other cases, the data master will only use a burstcount of 1.

    To perform a burst write to your component you could use a DMA component.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    --- Quote Start ---

    The Nios II processor only supports bursting when filling/flushing the cache. In all other cases, the data master will only use a burstcount of 1.

    To perform a burst write to your component you could use a DMA component.

    --- Quote End ---

    i see, i think ill stick with the non-burst writing, thanks