Bug report: Quartus will not load correct library in VHDL

First of all - altera dont really monitor this forum. To raise a bug ticket you need to log into mysupport on the altera website.

What is this altera-extended-vhdl you speak of? there is no such thing.

VHDL has no ability to "hide" modules behind namespaces.

VHDL has libraries. Also, quartus doesnt necessarily follow all the library rules in VHDL, unless you are explicit about it in the compile options, either in the file settings or with the -library switch in the .qsf file. Otherwise it just dumps everything into the work library and pretty much ignores any library names in your code. This is probably the root of your problem, as it will just search through the library for the first entity called "calc", even though you think you've put them into two different libraries.

I also note in your main.vhd, unless you've compiled a calc component into the arithmetic.std_logic_arith package (why have you made your own version of a non-standard VHDL package?), there will be an in the compiler that calc doesnt exist. Where is the code for your std_logic_arith package? Why are you doing arithmatic with std_logic_vectors? they are not meant to represent numbers, they are just a collection of bits. They could be integers, signed, unsigned, floats, fixed point - you just have no way of knowing. Why not use the numeric_std package (which part of the VHDL standard) that allows you to do arithmatic on signed and unsigned at the same time in the same file.

Either way, you're coming at compilation like a programmer with complicated name spaces. These just dont exist in VHDL or quartus.