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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Buffering a signal.

I'd like to understand. Suppose I do so signal_1 <= signal_0; signal_2 <= signal_1; if signal_0 is '1' on the first clock and '0' on the second - does signal_2 keep its value for two clock...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I see. Thank you.

One more question. Is it valid to do so? 


process(reset_n, clk0)
    begin
      if reset_n='0' then
         signal_1_synch  <= '0';
         signal_2_synch  <= '0';
      elsif (clk0'event and clk0 = '1') then
         signal_1_synch  <= signal_0_synch;
         signal_2_synch  <= signal_1_synch;
         signal_0_synch  <= '0';
      end if;
    end process;

I need to reset signal_0_synch immediately and keep value of signal_2_synch for 2 clocks.