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Altera_Forum's avatar
Altera_Forum
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13 years ago

Buffer port in Quartus schematic

Hello all,

Does anybody know how to put a buffer symbol as a buffer port in Quartus schematic?

In VHDL, I can simply use folloing line to declare a buffer port in Entity part.

aluout: buffer STD_LOGIC_VECTOR[31 DOWNTO 0]

But in schematic, I can only find three port symbols [INPUT, OUTPUT, BIDIR] from symbol tree /libraries/Primitive/pin..

These three symbols will become [in, out, inout] when converting the schematic to VHDL code.

Is it possible to create the buffer port in schematic so that it will convert to the desired VHDL code as shown above?

Thanks a lot!

Hsing

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Buffer is a special VHDL requirement for output signals that are also read internal to the design. It has no actual meaning from a hardware viewpoint and no equivalent in other languages or block diagrams. I guess, generated HDL code will rather copy the internal signal than creating a buffer port, but as said it's functionally meaningless.

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    in the BDF, you just connect the wire that connects to the output pin to whatever you want it to. This is the same as buffer in VHDL.

    Buffer has now been made pretty redundant with VHDL 2008 as you can read out ports.