--- Quote Start ---
I am facing similar problem.
I am using an optical fiber to transmit the data. So there will be delay. Can you write the part of the code that will do the waiting for data and enabling checking?
--- Quote End ---
You don't expect rx valid to appear from somewhere. It is you rx design front end that receives data, processes it and decides that it is now "locked"
This may involve many complex modules if you are talking about say wireless (analogue stage) e.g. carrier tracking, clock recovery, demapping and so on depending on your design.
The Tx can send cyclical prbs, process data, modulate, filter, upsample etc then send to rx.
The Rx reverses all processes and when data processing is ready you generate data valid.
Since tx is sending data in a cyclic way then you can sync your rx prbs to beginning of any cycle once ready.
Honored Contributor
