Altera_ForumHonored Contributor13 years agoBFM in VHDL - from Quartus2 13.0 From the release 13.0 of Quartus2, BFM in VHDL are supported. Before 13.0, BFM were only supported in Verilog and there was a testbench example in System Verilog found in "Avalon Verification IP S...Show More
Altera_ForumHonored Contributor12 years agoHello, please has anybody an example of test program for BFM in VHDL? Thank you very much.
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