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Altera_Forum
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13 years ago

Best way to code a clock divider?

Hello, I have to divide a clock input signal by 2048. I was wondering which method was the best to implement this divider in a FPGA. I know that we can use either a counter or just some flip-fl...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

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What's the reason of manually synthesizing a counter, like you did? The logic synthesizer is supposed to do that boring job.

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School assignment most likely. :D