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Altera_Forum's avatar
Altera_Forum
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14 years ago

Best power reduction approach when idle

Hi lets say I have a relatively large block of logic (> 1K LE) that is can be idle part of the time, because the outputs are ignored. what is the best way the reduce the power consumed by thi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Cris, lets assume for portability and scalability sakes that I don't have a spare PLL.

what would you consider a lesser evil?