Best power reduction approach when idle

The safest option will be a clock enable. As Cris says, its switching logic that consumes power, so preventing a registers from changing will save some power.

Just one note to add to what cris said about resets: In Altera devices the registers do not have a sync reset input - when you infer registers from HDL if there is a sync reset, it actually muxes the input to the register with the reset and non-reset option. So if you want a true reset, you are best using an async reset template, with the async reset synchronised to the clock.