Best debugging tool for my situation?

As suggested previously, the use of Signal Tap will get you where you need to go. Make sure to use enough sample depth to see the input frequency signals that you want. If you need to, you can make the clock in Signal Tap really a clock enable that is corresponding to the sample rate. This is simple hardware handshaking type of "Start" pulse to the ADC module. You may need to run the output of the ADC into a small section of logic, such as a comparator or something, so that Quartus does not synthesize away the ADC module itself. I have tested ADC modules in this manner several times. For example, the ADS7945 I have done this way and is similar to the part you are using. One more simple trick is to use a PWM DAC that will take the output register value of the ADC and drive a FPGA with a PWM value. If you use a small RC filter on this pin you can recover your analog signal. If you do this, you get the double benefit of being able to see your signal and Quartus not synthesizing away the actual ADC module. Best, James