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Altera_Forum's avatar
Altera_Forum
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12 years ago

Best debugging tool for my situation?

Hello people! I have created a small project for the DE0-Nano using the block editor and some custom FiniteStateMachine VHDL code to act as a ADC interface. I am using the ADS7953 of TexasInstr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Thanks!

The monitored signals can be any signal inside the FPGA? Do I need a special block in my design to act as an intermediate?