Altera_ForumHonored Contributor11 years agoBest approach for creating clock sources please? Hello again and more inane questions from yours truly! I have a design which relies on many different clock sources: A lot of inter-dependent timing going on. What therefore is the best (o...Show More
Altera_ForumHonored Contributor11 years agoSorry, yes the en_uM8MHz signal is high for 3 M24MHz clocks. Hence the source of the bursts.
Recent DiscussionsDocker image for Quartus Pro 26.1 missing ?Error (292014): Can't find valid feature line for core SLL_CA_HBC_T001_Hyperbus_Memory_Controller_10Agilex 5 – Critical HSSI Error in JESD204B Example DesignThe quartus license works with version 25.0 but not with version 17.0Error(23098) when using IPM_IOPLL on Agliex 7