Avalon MM "sniffer" connections in QSYS

Thanks Dave.

1. sounds promising.

2. would work but I want the component to be "stand alone" and report ordering errors to the NIOS via regulat registers and NIOS will report errors back to the Linux ( RC ) host system.

3. possible

4. Will work but the intention is to test actual hardware to catch ordering issues in the RC bridges / fabric .

The easy solution is to edit the top.v and mahd connect the data and datawrite signals out of the masters to the corresponding sniffer ports in my component. I am trying this now but I wanted to start with QSYS ...since

it generates the testbench for Modelsim ... it complains about there being no BFM for my conponent ( another problem ) ... but so far, the only way I can get QSYS to pass generate is to have my component sniffer ports

unconnected and back in QUARTUS make the connectiosn my self ... sysnthesis works on that but will simulation know about the connections ?

Thanks, Bob.